system type		: CUST_WSX16 (CN3860p3.X-500-EXP)
processor		: 0
cpu model		: Cavium Octeon V0.3
BogoMIPS		: 1000.00
wait instruction	: yes
microsecond timers	: yes
tlb_entries		: 32
extra interrupt vector	: yes
hardware watchpoint	: yes, count: 2, address/irw mask: [0x0ffc, 0x0ffb]
ASEs implemented	:
shadow register sets	: 1
kscratch registers	: 0
core			: 0
VCED exceptions		: not available
VCEI exceptions		: not available

processor		: 1
cpu model		: Cavium Octeon V0.3
BogoMIPS		: 1000.00
wait instruction	: yes
microsecond timers	: yes
tlb_entries		: 32
extra interrupt vector	: yes
hardware watchpoint	: yes, count: 2, address/irw mask: [0x0ffc, 0x0ffb]
ASEs implemented	:
shadow register sets	: 1
kscratch registers	: 0
core			: 1
VCED exceptions		: not available
VCEI exceptions		: not available

processor		: 2
cpu model		: Cavium Octeon V0.3
BogoMIPS		: 1000.00
wait instruction	: yes
microsecond timers	: yes
tlb_entries		: 32
extra interrupt vector	: yes
hardware watchpoint	: yes, count: 2, address/irw mask: [0x0ffc, 0x0ffb]
ASEs implemented	:
shadow register sets	: 1
kscratch registers	: 0
core			: 2
VCED exceptions		: not available
VCEI exceptions		: not available

processor		: 3
cpu model		: Cavium Octeon V0.3
BogoMIPS		: 1000.00
wait instruction	: yes
microsecond timers	: yes
tlb_entries		: 32
extra interrupt vector	: yes
hardware watchpoint	: yes, count: 2, address/irw mask: [0x0ffc, 0x0ffb]
ASEs implemented	:
shadow register sets	: 1
kscratch registers	: 0
core			: 3
VCED exceptions		: not available
VCEI exceptions		: not available

processor		: 4
cpu model		: Cavium Octeon V0.3
BogoMIPS		: 1000.00
wait instruction	: yes
microsecond timers	: yes
tlb_entries		: 32
extra interrupt vector	: yes
hardware watchpoint	: yes, count: 2, address/irw mask: [0x0ffc, 0x0ffb]
ASEs implemented	:
shadow register sets	: 1
kscratch registers	: 0
core			: 4
VCED exceptions		: not available
VCEI exceptions		: not available

processor		: 5
cpu model		: Cavium Octeon V0.3
BogoMIPS		: 1000.00
wait instruction	: yes
microsecond timers	: yes
tlb_entries		: 32
extra interrupt vector	: yes
hardware watchpoint	: yes, count: 2, address/irw mask: [0x0ffc, 0x0ffb]
ASEs implemented	:
shadow register sets	: 1
kscratch registers	: 0
core			: 5
VCED exceptions		: not available
VCEI exceptions		: not available

processor		: 6
cpu model		: Cavium Octeon V0.3
BogoMIPS		: 1000.00
wait instruction	: yes
microsecond timers	: yes
tlb_entries		: 32
extra interrupt vector	: yes
hardware watchpoint	: yes, count: 2, address/irw mask: [0x0ffc, 0x0ffb]
ASEs implemented	:
shadow register sets	: 1
kscratch registers	: 0
core			: 6
VCED exceptions		: not available
VCEI exceptions		: not available

processor		: 7
cpu model		: Cavium Octeon V0.3
BogoMIPS		: 1000.00
wait instruction	: yes
microsecond timers	: yes
tlb_entries		: 32
extra interrupt vector	: yes
hardware watchpoint	: yes, count: 2, address/irw mask: [0x0ffc, 0x0ffb]
ASEs implemented	:
shadow register sets	: 1
kscratch registers	: 0
core			: 7
VCED exceptions		: not available
VCEI exceptions		: not available

processor		: 8
cpu model		: Cavium Octeon V0.3
BogoMIPS		: 1000.00
wait instruction	: yes
microsecond timers	: yes
tlb_entries		: 32
extra interrupt vector	: yes
hardware watchpoint	: yes, count: 2, address/irw mask: [0x0ffc, 0x0ffb]
ASEs implemented	:
shadow register sets	: 1
kscratch registers	: 0
core			: 8
VCED exceptions		: not available
VCEI exceptions		: not available

processor		: 9
cpu model		: Cavium Octeon V0.3
BogoMIPS		: 1000.00
wait instruction	: yes
microsecond timers	: yes
tlb_entries		: 32
extra interrupt vector	: yes
hardware watchpoint	: yes, count: 2, address/irw mask: [0x0ffc, 0x0ffb]
ASEs implemented	:
shadow register sets	: 1
kscratch registers	: 0
core			: 9
VCED exceptions		: not available
VCEI exceptions		: not available

processor		: 10
cpu model		: Cavium Octeon V0.3
BogoMIPS		: 1000.00
wait instruction	: yes
microsecond timers	: yes
tlb_entries		: 32
extra interrupt vector	: yes
hardware watchpoint	: yes, count: 2, address/irw mask: [0x0ffc, 0x0ffb]
ASEs implemented	:
shadow register sets	: 1
kscratch registers	: 0
core			: 10
VCED exceptions		: not available
VCEI exceptions		: not available

processor		: 11
cpu model		: Cavium Octeon V0.3
BogoMIPS		: 1000.00
wait instruction	: yes
microsecond timers	: yes
tlb_entries		: 32
extra interrupt vector	: yes
hardware watchpoint	: yes, count: 2, address/irw mask: [0x0ffc, 0x0ffb]
ASEs implemented	:
shadow register sets	: 1
kscratch registers	: 0
core			: 11
VCED exceptions		: not available
VCEI exceptions		: not available

processor		: 12
cpu model		: Cavium Octeon V0.3
BogoMIPS		: 1000.00
wait instruction	: yes
microsecond timers	: yes
tlb_entries		: 32
extra interrupt vector	: yes
hardware watchpoint	: yes, count: 2, address/irw mask: [0x0ffc, 0x0ffb]
ASEs implemented	:
shadow register sets	: 1
kscratch registers	: 0
core			: 12
VCED exceptions		: not available
VCEI exceptions		: not available

processor		: 13
cpu model		: Cavium Octeon V0.3
BogoMIPS		: 1000.00
wait instruction	: yes
microsecond timers	: yes
tlb_entries		: 32
extra interrupt vector	: yes
hardware watchpoint	: yes, count: 2, address/irw mask: [0x0ffc, 0x0ffb]
ASEs implemented	:
shadow register sets	: 1
kscratch registers	: 0
core			: 13
VCED exceptions		: not available
VCEI exceptions		: not available

processor		: 14
cpu model		: Cavium Octeon V0.3
BogoMIPS		: 1000.00
wait instruction	: yes
microsecond timers	: yes
tlb_entries		: 32
extra interrupt vector	: yes
hardware watchpoint	: yes, count: 2, address/irw mask: [0x0ffc, 0x0ffb]
ASEs implemented	:
shadow register sets	: 1
kscratch registers	: 0
core			: 14
VCED exceptions		: not available
VCEI exceptions		: not available

processor		: 15
cpu model		: Cavium Octeon V0.3
BogoMIPS		: 1000.00
wait instruction	: yes
microsecond timers	: yes
tlb_entries		: 32
extra interrupt vector	: yes
hardware watchpoint	: yes, count: 2, address/irw mask: [0x0ffc, 0x0ffb]
ASEs implemented	:
shadow register sets	: 1
kscratch registers	: 0
core			: 15
VCED exceptions		: not available
VCEI exceptions		: not available

